1. Field of the Invention
The present invention generally relates to an analog-digital conversion method and an analog-digital converter and, more particularly, to an analog-digital conversion method and an analog-digital converter of a pipeline type and that of a cyclic type.
2. Description of the Related Art
In recent years, a variety of additional functions are built in mobile appliances such as a mobile telephone set, including the image pick-up function, the image playback function, the moving image pick-up function and the moving image playback function. In association with this, there is an increasing demand for miniaturization and power saving of an analog-digital converter (hereinafter, referred to as an AD converter). One mode of AD converter that addresses this demand is known as an AD converter of a cyclic type configured to go through discrete cycles (see, for example, the Related art list No. 1).
Related Art List
    1. Japanese Patent Application Laid-open No. 4-26229
In the cyclic AD converter of FIG. 1 of the patent document No. 1, the parallel A/D converter AD2 is assigned the task of converting into 3 bits. Therefore, a high gain of 8 is required of the subtracter circuit SUB2 or the sample and hold circuit S/H4.
However, the performance of an amplifier circuit is limited by a factor known as gain bandwidth product (GB product). The higher the target gain, the lower the operating frequency of the amplifier and the slower the operation. Accordingly, the amplifier circuit constitutes a limiting factor in the speed of operation of the AD converter as a whole.